Stage B · WASM FPGA / LUT commit-gate simulator

Rust decision core in the browser. WebGPU paints the allow look-up table (LUT) and commit trace. This page is a simulated instrument. For the physical board path, use the Alchitry Pt V2 guide.

Acceptance: bit-agree with Stage A seed-1 golden (committed 1, refused 15, analytical joules 8.6795e-10). Stage C (2026-09-30): Alchitry Pt V2 UART transcript agrees with the same seed-1 allow/refuse sequence under commit = lut_allow AND energy_ok AND cbf_ok (on seed-1 the CBF conjunct matches LUT and Safe PH alone); energy still unmetered. CTA: run the WASM episode below, then open the Alchitry builder guide and Stage C UART evidence.

Measurement class. The commit / refuse sequence and certificate fields are produced by the same Rust functions as Stage A, compiled to WebAssembly. Analytical episode joules come from the OpCounter model. WebGPU GPU time is not energy and is not board power. Icarus Verilog remains the RTL oracle on the workstation. This page does not replace it and does not report Alchitry Pt V2 watts.
fpga-sim

Seed-1 episode · WASM core + WebGPU view

simulated (WASM) WebGPU viz V2
Open Alchitry guide Stage C UART evidence Loading WASM module…

Agreement with Stage A golden

status
-
committed
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refused
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energy_only
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episode J
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expected J
8.6795e-10
|ΔJ|
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commit step
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ops
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allow_mask
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LUT mem SHA-256
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board_synth_claimed
-

WebGPU LUT + trace paint

WebGPU idle.

Commit trace (WASM)

iluteokcommitbits uθωV̇_q

Rebuild: from wca-lut-edge, run wasm-pack build crates/wca-fpga-sim --target web --release --out-dir …/living/fpga-sim/pkg (see crate README). Stage C: see Alchitry Pt V2 guide and board-evidence.md (programmed; energy unmetered).